1. Field of the Invention
The present invention relates to a semiconductor device testing apparatus for testing one or more semiconductor devices, particularly one or more semiconductor integrated circuit elements (as will be referred to as IC or ICs hereinafter) which are typical examples of the semiconductor devices as to whether an IC or ICs operate in normal manner or not. More particularly, the present invention relates to a semiconductor device testing apparatus of the type in which one or more ICs to be tested (IC under test) are loaded on a test tray and transported together with the test tray, for testing, to a test or testing section where the ICs are brought into electrical contact with a socket or sockets of a tester head (a component of the testing apparatus for applying and receiving various electrical signals for testing) in the state that they remain loaded on the test tray to perform an electrical test of the ICs, after the testing, carry the tested ICs out of the test section, and to sort out the tested ICs into conformable or pass articles and unconformable or failure articles on the basis of the data of the test results.
2. Description of the Related Art
Many of electrical portions (commonly called tester part) of semiconductor device testing apparatus for applying a test signal of a predetermined pattern to a semiconductor device to be tested, i.e. device under test (commonly called DUT) and measuring the electrical characteristics of the devices, have a semiconductor device transporting and handling or processing apparatus (commonly called handler) connected or mounted thereto which transports semiconductor devices to a test section, brings them into electrical contact with sockets of a tester head in the test section, after the testing, carries the tested semiconductor devices out of the test section, and sorts out them into pass articles and failure articles on the basis of the data of the test results. In the specification of the present application, the testing apparatus which comprises a combination of the tester part and the handler connected thereto or integrally mounted thereto of the type described above is termed "semiconductor device testing apparatus". In the following disclosure the present invention will be described by taking ICs typical of semiconductor devices, for example, for clarity of explanation.
A description will be given first regarding the general construction of a conventional IC testing apparatus having a handler called "horizontal transporting system" mounted thereto with reference to FIGS. 4 and 5. The illustrated IC testing apparatus comprises a chamber section 100 for testing ICs such as semiconductor memories which are loaded on a test tray TST and carried on the test tray TST, an IC storage section 200 where ICs which will undergo a test (i.e., ICs to be tested) are sorted out and the tested ICs are sorted out and stored in place, a loader section 300 where ICs to be tested which a user has beforehand loaded on a general-purpose tray (customer tray) KST are transferred and reloaded onto a test tray TST capable of withstanding high/low temperatures, and an unloader section 400 where the tested ICs which have been carried on the test tray TST out of the chamber section 100 subsequently to undergoing a test in the testing chamber 100 are transferred from the test tray TST to one or more general-purpose trays KST to be reloaded on the latter. The unloader section 400 is generally constructed to sort out the tested ICs by categories on the basis of the data of the test results and load them on the corresponding general-purpose trays.
The chamber section 100 comprises a constant temperature or thermostatic chamber 101 for receiving the ICs to be tested loaded on the test tray TST and imposing an intended high or low temperature stress to the ICs, a test or testing chamber 102 for effecting an electrical test on the ICs subjected to the temperature stress in the constant temperature chamber 101, and a temperature-stress removing chamber 103 for removing the temperature stress of the ICs having been applied thereto in the test chamber 102 from the ICs. The test chamber 102 contains therein a tester head 104 of the testing apparatus, supplies various electric signals for testing via the tester head 104 to the ICs under test in electrically contact with sockets mounted to the tester head 104, receives response signals from the ICs, and sends them to the tester part of the testing apparatus.
Each of the test trays TST is moved in a circulating manner from the loader section 300 through the constant temperature chamber 101 of the chamber section 100, the test chamber 102 of the chamber section 100, the temperature-stress removing chamber 103 of the chamber section 100, and the unloader section 400 in this order, to the loader section 300. The constant temperature chamber 101 and the temperature-stress removing chamber 103 are taller than the test chamber 102, and have upward portions protruding beyond the top of the test chamber 102, respectively. As shown in FIG. 5, a base plate 105 spans between the upward protruding portions of the constant temperature chamber 101 and the temperature-stress removing chamber 103, and a test tray conveying means 108 is mounted on the base plate 105 to transport the test tray TST from the temperature-stress removing chamber 103 to the constant temperature chamber 101.
In case a temperature stress of a high temperature (a thermal stress) has been applied to the ICs to be tested in the constant temperature chamber 101, the temperature-stress removing chamber 103 cools the tested ICs down to room temperature by blowing, after which they are transported to the unloader section 400. On the other hand, in case a temperature stress of a low temperature such as, for instance, -30.degree. C. (a cryogenic stress) has been applied to the ICs to be tested in the constant temperature chamber 101, the temperature-stress removing chamber 103 heats the tested ICs by warm air or a heater up to a temperature at which the ICs have no any dew condensation, and then they are carried out of the temperature-stress removing chamber 103 to the unloader section 400.
The test tray TST with the ICs loaded thereon in the loader section 300 is conveyed from the loader section to the constant temperature chamber 101 within the chamber section 100. The constant temperature chamber 101 has a vertical conveyor means mounted therein which is adapted to support a plurality of (nine, for instance) test trays TST in the form of a stack. In the illustrated example, the vertical conveyor means stacks the transported test trays such that a test tray newly received from the loader section 300 is supported at the uppermost of the stack while the bottom test tray is delivered to the test chamber 102. The ICs to be tested on the uppermost test tray TST are given a predetermined high or low temperature stress while the associated test tray TST is moved sequentially from the top to the bottom of the stack by vertically downward movement of the vertical conveyor means and/or waits till the immediately preceding test tray is brought out of the test chamber 102.
The tester head 104 is disposed in the test chamber 102 at the central area thereof, and each of the test trays TST carried out one by one from the constant temperature chamber 101 is conveyed onto the tester head 104 while maintained at the constant temperature, and a predetermined number of the ICs among the ICs on the associated test tray TST are electrically connected to IC sockets (not shown) mounted on the tester head 104, as will be discussed hereinbelow. Upon completion of the test on all of the ICs placed on one test tray TST through the tester head 104, the test tray TST is transported to the temperature-stress removing chamber 103 where the tested ICs on the associated test tray are relieved of temperature stress to be restored to the ambient or room temperature, and thereafter the test tray TST is discharged to the unloader section 400.
Like the constant temperature chamber 101 as described above, the temperature-stress removing chamber 103 is also equipped with a vertical conveyor means adapted to support a plurality of (nine, for instance) test trays TST stacked one on another. In the illustrated example, the test tray TST newly received from the test chamber 102 is supported at the bottom of the stack while the uppermost test tray is discharged to the unloader section 400. The tested ICs on the associated test tray are relieved of temperature stress to be restored to the outside temperature (room temperature) as the associated test tray TST is moved from the bottom to the top of the stack by vertically upward movement of the vertical conveyor means.
The tested ICs as carried on the test tray TST are passed to the unloader section 400 where they are sorted out by categories based on the test results and transferred from the test tray TST onto and stored in the corresponding general-purpose trays for respective categories. The test tray TST thus emptied in the unloader section 400 is transported to the loader section 300 where it is again loaded with ICs to be tested from a general-purpose tray KST onto the test tray TST, after which the same steps of above-described operation are repeated.
As shown in FIG. 5, an IC transfer means for transferring ICs from a general-purpose tray KST to a test tray TST in the loader section 300 may be in the form of X and Y direction transfer means 304 which comprises a pair of spaced parallel rails 301 mounted on the base plate 105 and extending over the loader section 400 in the front-to-back or forward-rearward direction of the testing apparatus (referred to as the Y direction herein), a movable arm 302 which spans between the two rails 301 and has its opposite ends secured thereto in a manner to be movable in the Y direction, and a movable head 303 which is supported by the movable arm 302 in a manner to be movable in the direction in which the movable arm 302 extends, that is in the left to right direction of the testing apparatus (referred to as the X direction herein). With this arrangement, the movable head 303 is allowed to reciprocate between the test tray TST and the general-purpose tray KST in the Y direction and move along the movable arm 302 in the X direction.
On the underside of the movable head 303 are vertically movably mounted IC suction pads to be described later with reference to FIG. 7. Through the movement of the movable head 303 in the X and Y directions and the downward movement of the suction pads in combination, the suction pads are brought into abutment with the ICs placed on the general-purpose tray KST and pick them up and hold thereto by vacuum suction to transfer them to the test tray TST. The number of suction pads that are mounted on the movable head 303 may be eight, for instance, so that a total of eight ICs may be transferred from the general-purpose tray KST to the test tray TST at one time.
It is to be noted here that means 305 for correcting the position of an IC called "preciser" is located between stopping positions for the general-purpose tray KST and the test tray TST. The position correcting means 305 includes relatively deep recesses into which the ICs as being attracted against the suction pads are once released to fall prior to being transferred to the test tray TST. The recesses are each defined by vertical tapered side walls which prescribe for the positions at which the ICs drop into the recesses by virtue of the tapering. After eight ICs have been precisely positioned relative to each other by the position correcting means 305, those eight ICs accurately positioned are again attracted against the suction pads and conveyed to the test tray TST. The reason that the position correcting means 305 is provided is as follows. Recesses of the general-purpose tray TST for holding the ICs are sized larger as compared to the size of ICs, resulting in wide variations in positions of ICs placed on the general-purpose tray KST. Consequently, if the ICs as such were vacuum picked up by the suction pads and transferred directly to the test tray TST, there might be some of the ICs which could not be successfully deposited into the IC storage recesses formed in the test tray TST. This is the reason for requiring the position correcting means 305, as described above which acts to array ICs as accurately as the array of the IC storage recesses formed in the test tray TST.
The unloader section 400 is equipped with two sets of X and Y direction transfer means 404 which are identical in construction to the X and Y direction transfer means 304 provided for the loader section 300. The X and Y direction transfer means 404 perform to transship the tested ICs from the test tray TST delivered out to the unloader section 400 onto the general-purpose tray KST. Each set of the X and Y direction transfer means 404 comprises a pair of spaced parallel rails 401 mounted to extend in the forward-rearward direction of the testing apparatus (Y direction), a movable arm 402 spanning between the pair of rails 401 and movably mounted at opposite ends on the pair of rails 401 in the Y direction, and a movable head 403 mounted on the movable arm 402 for movement therealong longitudinally of the arm, that is, in the right to left direction of the testing apparatus (X direction).
FIG. 6 shows the construction of one example of the test tray TST. The illustrated test tray TST comprises a rectangular frame 12 having a plurality of equally spaced apart parallel cleats 13 between the opposed side frame members 12a and 12b of the frame, each of the cleats 13 having a plurality of equally spaced apart mounting lugs 14 protruding therefrom on both sides thereof and each of the side frame members 12a, 12b opposing the adjacent cleats having similar mounting lugs 14 protruding therefrom. The mounting lugs 14 protruding from the opposed sides of each of the cleats 13 are arranged such that each of the mounting lugs 14 protruding from one side of the cleat 13 is positioned intermediate two adjacent mounting lugs 14 protruding from the opposite side of the cleat. Similarly, each of the mounting lugs 14 protruding from each of the side frame members 12a and 12b is positioned intermediate two adjacent mounting lugs 14 protruding from the opposed cleat. Formed between each pair of opposed cleats 13 and between each of the side frame members 12a and 12b and the opposed cleats are spaces for accommodating a multiplicity of IC carriers 16 in juxtaposition. More specifically, each IC carrier 16 is accommodated in one of an array of rectangular carrier compartments 15 defined in each of said spaces, each compartment 15 including two staggered, obliquely opposed mounting lugs 14 located at the diagonally opposed corners of the compartment. In the illustrated example wherein each cleat 13 has sixteen mounting lugs 14 on either side thereof, there are sixteen carrier compartments 15 formed in each of said spaces, in which sixteen IC carriers 16 are mounted. Since there are four of the spaces, 16.times.4, that is, 64 IC carriers in total can be mounted in one test tray TST. Each IC carrier 16 is placed on corresponding two mounting lugs 14 and fixed thereto by fasteners 17.
Each of IC carriers 16 is of identical shape and size in its outer contour and has an IC pocket 19 in the center for accommodating an IC element therein. In the illustrated example, the IC pocket 19 is in the shape of a generally square recess. The shape and size of the IC pocket 19 are determined depending on those of the IC element 18 to be accommodated therein. For this reason, every time the shape and size of ICs to be tested differ from those of ICs already tested, IC carriers 16 having IC pockets 19 of the corresponding shape and size are provided, and are substituted for IC carriers presently in use. The outer dimensions of the IC pocket 19 are sized so as to be loosely fitted in the space defined between the opposed mounting lugs 14 in the carrier compartment 15. The IC carrier 16 has flanges at its opposed ends adapted to rest on the corresponding mounting lugs 14, these flanges having mounting holes 21 and holes 22 formed therethrough, respectively, the mounting holes 21 being adapted to receive fasteners 17 therethrough and the holes 22 being adapted to pass locating pins therethrough.
In order to prevent IC elements from slipping out of place within the IC carrier 16 or jumping out of the IC carrier 16, a pair of latches 23 are attached to the IC carrier 16, as shown in FIG. 7. These latches 23 are integrally formed with the body of the IC carrier so as to extend upwardly from the base of the IC pocket 19, and are normally resiliently biased such that the top end pawls are urged toward each other by virtue of the resiliency of the resin material of which the IC carrier is made. When the IC element is to be deposited into or removed from the IC pocket 19, the top ends of the two latches 23 are expanded away from each other by a latch releasing mechanism 25 disposed on opposite sides of an IC suction pad 24 for picking up an IC element prior to effectuating the deposition of the IC element into or removal from the IC pocket 19. Upon the latch releasing mechanism 25 being moved out of engagement with the latches 23, the latches 23 will snap back to their normal positions by their resilient forces where the deposited IC is held in place against dislodgement by the top end pawls of the latches 23.
The IC carrier 16 holds an IC element in place with its leads or pins 18 exposed downwardly as shown in FIG. 8. The tester head 104 has an IC socket mounted thereto, and contacts 104A of the IC socket upwardly extend from the top surface of the tester head 104. The exposed leads 18 of the IC element are pushed against the contacts 104A of the IC socket to establish electrical connection between the IC element and the socket. To this end, a pusher 20 for pushing and holding an IC element down is mounted above the tester head 104 and is configured to push the IC element accommodated in an IC carrier 16 from above into contact with the tester head 104.
Referring to FIGS. 4 and 5 again, the IC storage section 200 comprises an IC storage rack (or stocker) 201 for accommodating general-purpose trays KST loaded with ICs to be tested and a tested IC storage rack (or stocker) 202 for accommodating general-purpose trays KST loaded with tested ICs sorted out by categories on the basis of the test results. The IC storage rack 201 and tested IC storage rack 202 are configured to accommodate general-purpose trays in the form of a stack. The general-purpose trays KST with ICs to be tested carried thereon and stored in the form of a stack in the IC storage rack 201 are transported successively from the top of the stack to the loader section 300 where the ICs to be tested (DUTS) are transferred from the general-purpose tray KST onto a test tray TST on standby in the loader section 300. Further, the IC storage rack 201 and the tested IC storage rack may be of identical shape, configuration and structure.
In the example illustrated in FIGS. 4 and 5, eight racks STK-1, STK-2, . . . , STK-8 are provided as tested IC storage racks 202 SO as to be able to store tested ICs which may be sorted out into eight categories at a maximum according to the test results. This is because in some applications tested ICs may not only be classified into categories of "conformable or pass article" and "unconformable or failure article" but also be subclassified into those having high, medium and low operation speeds among the "pass" articles and those required to be retested among the "failure" articles, and others. Even if the number of classifiable categories is up to eight, the unloader section 400 in the illustrated example is capable of accommodating only four general-purpose trays KST. For this reason, if there occur some among the tested ICs which should be classified into a category other than categories assigned to the general-purpose trays KST arranged in the unloader section 400, the procedures taken are to return one of the general-purpose trays KST from the unloader section 400 to the IC storage section 200 and in replacement to transfer a general-purpose tray KST for storing the ICs belonging to the new additional category from the IC storage section 200 to the unloader section 400 where those ICs are stored in the new tray.
As shown in FIG. 5, a tray transfer means 205 is disposed above the IC storage rack 201 and the tested IC storage racks 202 for movement over the entire extent of the storage racks 201 and 202 in the direction of arrangement of the racks (in the right to left direction of the testing apparatus) relative to the base plate 105. The tray transfer means 205 is provided on its bottom with grasp means for grasping a general-purpose tray KST. The tray transfer means 205 is moved to a position over the IC storage rack 201 whereupon the elevator 204 is actuated to lift the general-purpose trays KST stacked in the IC storage rack 201, so that the uppermost general-purpose tray KST may be picked up by the grasp means of the tray transfer means 205. Once the uppermost general-purpose tray KST loaded with ICs to be tested has been transferred to the tray transfer means 205, the elevator 204 is lowered to its original position. The tray transfer means 205 is then horizontally moved to and stopped at a predetermined position in the loader section 300 where the grasp means of the tray transfer means 205 is released to allow the general-purpose tray KST to drop into an immediately underlying tray receiver (not shown). The tray transfer means 205 from which the general-purpose tray KST has been unloaded is moved out of the loader section 300. Then, the elevator 204 is moved upward from below the tray receiver having the general-purpose tray KST deposited thereon to lift up the tray receiver and hence the general-purpose tray KST loaded with ICs to be tested so that the general-purpose tray KST is kept exposed up through a window 106 formed in the base plate 105.
The base plate 105 is formed in the area overlying the unloader section 400 with another two similar windows 106 through which empty general-purpose trays are kept exposed. In this example, each of the windows 106 is sized to expose two general-purpose trays therethrough. Hence, four empty general-purpose trays are kept exposed up through two windows 106. Tested ICs are sorted out and stored in these empty general-purpose trays KST according to the categories assigned to respective trays. As with the loader section 300, the four empty general-purpose trays KST are placed on the respective tray receivers which are moved up and down by the associated elevators 204. Once one general-purpose tray KST has been fully filled, the tray is lowered from the level of the window 16 by the elevator 204 and stored in the tray storage position assigned to said tray by the tray transfer means 205. Indicated by the reference numeral 206 in FIGS. 4 and 5 is an empty tray storage rack for accommodating empty general-purpose trays KST. From this empty tray storage rack 206, empty general-purpose trays are transported to the respective windows 106 by the tray transfer means 205 and the elevators 204 and held thereat by the associated elevators 204 to be ready for receiving tested ICs.
The number of IC elements which may be connected with the tester head 104 at one time depends on the number of IC sockets mounted on the tester head 104. In case of using a test tray TST of the structure shown in FIG. 6, IC carriers 16 for accommodating IC elements therein are arranged in a matrix of 4 lines.times.16 rows on that test tray TST as stated before, and hence sixty-four (64) IC elements in total can be loaded on the test tray.
On the contrary, the number of IC elements which can be tested at one time in the IC testing apparatus is limited, and it is difficult to test a large number of IC elements such as 64 IC elements at one time. By way of example, in case the IC testing apparatus is arranged so as to be able to test sixteen (16) IC elements at one time, 4.times.4, that is, 16 IC sockets in total are arranged and mounted on the tester head 104 such that the IC elements in every fourth row in each of the lines can be tested all at one time. More specifically, in the first test run the examination is conducted on sixteen IC elements (IC elements accommodated in the IC carriers 16 shown by oblique lines) located in the first, fifth, ninth and thirteenth rows in each line, the second test run is effected on another sixteen IC elements located in the second, sixth, tenth and fourteenth rows in each line by shifting the test tray TST by a distance corresponding to one row of IC elements, and the third and fourth test runs are carried out in the similar manner until all of the IC elements are tested.
Further, it is needless to say that where thirty-two IC sockets may be mounted on the tester head 104 in an array of 4.times.8 such that the IC elements in every second row in each of the lines can be tested all at one time, only two test runs are required to examine all sixty-four IC elements arranged in an array of 4 lines.times.16 rows.
The test results are stored in a memory at the addresses determined by, for instance, the identification number affixed to the test tray TST and the numbers of the IC carriers 16 assigned thereto within the test tray TST. The test results are used as the data for sorting out the tested ICs into pass articles and failure articles in transferring the tested ICs from the test tray TST to one or more general-purpose trays KST to be reloaded on the latter in the unloader section 400. The data are erased from the memory when the sorting operation is completed.
Heretofore, there are provided memories the number of which corresponds to that of IC sockets of the tester head 104, namely, one memory for one IC socket, and a method is used which comprises the steps of counting the number of occurrence of failure on ICs tested through the same IC socket to store the count value in the corresponding memory, determining that when the stored number of failure occurrence exceeds a predetermined value, the associated socket has a defect, and controlling such that an IC to be tested is not loaded on the IC carrier 16 which is brought into electrical contact with that IC socket.
Where a defect or failure of an IC socket is detected by use of such method, even though an examination is conducted on an IC socket which has been determined to be defective, there are often the cases that no defect can be found in the defective IC socket, and hence there is a disadvantage that it takes a long time and requires many hands to look into the cause.
As a result of the examination of the cause, it was found that in case a specified IC carrier 16 mounted to the test tray TST has a defect or failure, the associated IC socket with which the specified IC carrier 16 was brought into electrical contact was determined to be defective even though the associated IC socket has no defect. Most of the cases that an IC carrier 16 is determined to be defective result from occurrence of a break in a portion of the IC pocket 19 of the IC carrier 16 for accommodating an IC element therein or from the slight remainder of a burr or fin in the molding of plastic for the IC carrier whereby terminals of the IC accommodated in the IC pocket 19 are deformed and are incompletely brought into contact with the corresponding IC socket.
The above-mentioned problem also will occur in case that an IC testing apparatus uses a handler of the type which can be used in common in transferring ICs accommodated in a square-shaped pipe-like IC container which is of substantially rectangular shape in section called a "rod-like magazine" and ICs loaded on a general-purpose tray onto a test tray and transporting the test tray loaded with the ICs thereon to the test section for testing, followed by various processings of the tested ICs on the basis of the data of the test results (for example, refer to Japanese Patent Application No. 171911/1994).